| The Saturn was the successor to the
32X/Genesis Performance wise it's comparable to the Playstation, While it has some limited 3D capabilities (where it lagged behind the playstation) , it's real strength is 2D games, where it can create arcade quality performance |
|
Saturn Memory Map
All these can also be accessed through Cache Through addresses at $20000000
| Address | Purpose | Details |
| 0x00000000 |
Boot ROM | Repeats every 512 kb |
| 0x00100000 | SMPC registers | |
| 0x00180000 | Backup RAM | |
| 0x00200000 | Work RAM Low | |
| 0x00300000 | Random data | Random on every read (mostly 0x00) |
| 0x00400000 | Zero | Always returns 0x0000 |
| 0x00800000 | Unknown | Always returns 0x00000001000200030004000500060007 |
| 0x01000000 | Master Init (MINIT) | Data written goes to Master SH-2 Free Running Timer. Section is Write Only. |
| 0x01800000 | Slave Init (SINIT) | Data written goes to Slave SH-2 Free Running Timer. Section is Write Only. |
| 0x02000000 | CS0 | Cartridge 0 |
| 0x04000000 | CS1 | Cartridge 1 |
| 0x05000000 | Dummy | |
| 0x05800000 | CD-ROM registers (CS2) | Repeats every 64 Bytes |
| 0x05900000 | Unknown | It will lockup the saturn when read |
| 0x05A00000 | 68000 Audio Work RAM | Stores audio data that will be played |
| 0x05B00000 | SCSP registers | |
| 0x05C00000 | VDP1 VRAM | Video RAM for the 3D/Sprite VDP1 |
| 0x05C80000 | VDP1 Framebuffer | Current Image Buffer for the VDP1 to render to |
| 0x05D00000 | VDP1 Registers | VDP1 variables that change the functionality of how the VDP1 operates |
| 0x05D80000 | Lockup when read | |
| 0x05E00000 | VDP2 VRAM | Video Display Processor 2 (Background) Video RAM - Repeats every 512 kb |
| 0x05F00000 | VDP2 CRAM | VDP2 Color RAM - Basically the background Palette - Repeats every 4kb |
| 0x05F80000 | VDP2 registers | VDP2 variables that change the functionality of how the VDP2 operates - Repeats every 512 bytes |
| 0x05FC0000 | Unknown | Always returns 0x000E0000 |
| 0x05FE0000 | SCU registers | Repeats every 256 bytes |
| 0x05FF0000 | Unknown registers | Repeats every 256 bytes |
| 0x06000000 | Work RAM High |
VDP1
| Name | Address | Purpose | Bits | Details |
| TVHR | $25D00000 | TV mode selection (W) | %------------VTTT | V=Vblank erase / T=Tv mode |
| FBCR | $25D00002 | Frame buffer change mode (W) | %-----------EddFf | |
| PTMR | $25D00004 | Draw trigger (W) | %--------------PP | Plot trigger (0/1/2=Idle/Start/StartOnFrameChange) |
| EWDR | $25D00006 | Erase/write data (W) | %EEEEEEEEeeeeeeee | |
| EWLR | $25D00008 | Erase/write upper-left coordinate (W) | %-XXXXXXYYYYYYYYY | |
| EWRR | $25D0000A | Erase/write lower-right coordinate (W) | %XXXXXXXYYYYYYYYY | |
| ENDR | $25D0000C | Draw forced termination (W) | %---------------- | |
| EDSR | $25D00010 | Transfer end status (R) | %--------------CB | C=1=Fetched an ended / B=1=Fetched before end |
| LOPR | $25D00012 | Last operation command address (R) | %AAAAAAAAAAAAAA00 | Address / 8h |
| COPR | $25D00014 | Current operation command address (R) | %AAAAAAAAAAAAAA00 | Address / 8h |
| MODR | $25D00016 | Mode status (R) | %VVVV---PEDdFvTTT | V=Version
/ P=plot trigger E=even coord / D=double interlace enable/ d=double interlace draw / F=Frame buffer change mode / v=vblank erase/write enable / T=tvmode selection |
VDP2
| Name | Address | Purpose | Bits | Details |
| TVMD | $25F80000 | TV Screen Mode (Read Allowed) | %D------BLLVV-HHH | D=1=Screen on B=1=Blackout L=interlace H=Hres V=Vres |
| EXTERN | $25F80002 | External Signal Enable Register | %------LS------sG | |
| TV STAT | $25F80004 | Screen Status (Read Only) | %------LS----VHOP | |
| VRSIZE | $25F80006 | VRAM size (Read Allowed) | %V-----------vvvv | |
| HCNT | $25F80008 | H-Counter (Read Only) | %------HHHHHHHHHH | |
| VCNT | $25F8000A | V-Counter (Read Only) | %------VVVVVVVVVV | |
| $25F8000C | Reserved | |||
| RAMCTL | $25F8000E | Ram Control (Read Allowed) | %C-cc--VVRRRRRRRR | C=CRKTE
c=CRMD V=VRBMD R=RDBS |
| CLCA0L | $25F80010 | Vram Cycle Pattern (Bank A0) | %VVVVVVVVVVVVVVVV | |
| CYCA0U | $25F80012 | Vram Cycle Pattern (Bank A0) | %VVVVVVVVVVVVVVVV | |
| CLCA1L | $25F80014 | Vram Cycle Pattern (Bank A1) | %VVVVVVVVVVVVVVVV | |
| CYCA1U | $25F80016 | Vram Cycle Pattern (Bank A1) | %VVVVVVVVVVVVVVVV | |
| CLCB0L | $25F80018 | Vram Cycle Pattern (Bank B0) | %VVVVVVVVVVVVVVVV | |
| CYCB0U | $25F8001A | Vram Cycle Pattern (Bank B0) | %VVVVVVVVVVVVVVVV | |
| CLCB1L | $25F8001C | Vram Cycle Pattern (Bank B1) | %VVVVVVVVVVVVVVVV | |
| CYCB1U | $25F8001E | Vram Cycle Pattern (Bank B1) | %VVVVVVVVVVVVVVVV | |
| BGON | $25F80020 | Screen Display Enable | %---RNNNN--rrnnnn | RN=Transparency / rn=enabled |
| MZCTL | $25F80022 | Mosaic Control | %MMMMMMMM---RNNNN | |
| SFSEL | $25F80024 | Special Function Code Select | %-----------RNNNN | |
| SFCODE | $25F80026 | Special Function Code | %SSSSSSSSSSSSSSSS | |
| CHCTLA | $25F80028 | Character Control (NBG0, NBG1) | %--CCNNES-cccnnes | c=colors
(16/256/2k/32k/16m) e=1=bmp format nn=bmp size (512x256/512x512/ 1024x256/1024x512) |
| CHCTLB | $25F8002A | Character Control (NBG2, NBG3,RBG0) | %-RRR-rrr--NN--nn | |
| BMPNA | $25F8002C | Bitmap Palette Number (NBG0, NBG1) | %--NN-nnn--NN--nn | |
| BMPNB | $25F8002E | Bitmap Palette Number (RGB0) | %----------NN--nn | |
| PNCN0 | $25F80030 | Pattern Name Control (NBG0) | %NN----NNNNNNNNNN | |
| PNCN1 | $25F80032 | Pattern Name Control (NBG1) | %NN----NNNNNNNNNN | |
| PNCN2 | $25F80034 | Pattern Name Control (NBG2) | %NN----NNNNNNNNNN | |
| PNCN3 | $25F80036 | Pattern Name Control (NBG3) | %NN----NNNNNNNNNN | |
| PNCR | $25F80038 | Pattern Name Control (RBG0) | %NN----NNNNNNNNNN | |
| PLSZ | $25F8003A | Plane Size | %RRRRRRRRNNNNNNNN | |
| MPOFN | $25F8003C | Map Offset (NBG0-NBG3) | %-NNN-nnn-NNN-nnn | |
| MPOFR | $25F8003E | Map Offset (Rotation Parameter A,B) | %---------BBB-AAA | |
| MPABN0 | $25F80040 | MAP (NBG0 Plane A,B) | %--NNNNNN--nnnnnn | |
| MPCDN0 | $25F80042 | MAP (NBG0 Plane C,D) | %--NNNNNN--nnnnnn | |
| MPABN1 | $25F80044 | MAP (NBG1 Plane A,B) | %--NNNNNN--nnnnnn | |
| MPCDN1 | $25F80046 | MAP (NBG1 Plane C,D) | %--NNNNNN--nnnnnn | |
| MPABN2 | $25F80048 | MAP (NBG2 Plane A,B) | %--NNNNNN--nnnnnn | |
| MPCDN2 | $25F8004A | MAP (NBG2 Plane C,D) | %--NNNNNN--nnnnnn | |
| MPABN3 | $25F8004C | MAP (NBG3 Plane A,B) | %--NNNNNN--nnnnnn | |
| MPCDN3 | $25F8004E | MAP (NBG3 Plane C,D) | %--NNNNNN--nnnnnn | |
| MPABRA | $25F80050 | MAP (Rotation Parameter A Plane A,B) | %--RRRRRR--rrrrrr | |
| MPCDRA | $25F80052 | MAP (Rotation Parameter A Plane C,D) | %--RRRRRR--rrrrrr | |
| MPEFRA | $25F80054 | MAP (Rotation Parameter A Plane E,F) | %--RRRRRR--rrrrrr | |
| MPGHRA | $25F80056 | MAP (Rotation Parameter A Plane G,H) | %--RRRRRR--rrrrrr | |
| MPIJRA | $25F80058 | MAP (Rotation Parameter A Plane I,J) | %--RRRRRR--rrrrrr | |
| MPKLRA | $25F8005A | MAP (Rotation Parameter A Plane K,L) | %--RRRRRR--rrrrrr | |
| MPMNRA | $25F8005C | MAP (Rotation Parameter A Plane M,N) | %--RRRRRR--rrrrrr | |
| MPOPRA | $25F8005E | MAP (Rotation Parameter A Plane O,P) | %--RRRRRR--rrrrrr | |
| MPABRB | $25F80060 | MAP (Rotation Parameter B Plane A,B) | %--RRRRRR--rrrrrr | |
| MPCDRB | $25F80062 | MAP (Rotation Parameter B Plane C,D) | %--RRRRRR--rrrrrr | |
| MPEFRB | $25F80064 | MAP (Rotation Parameter B Plane E,F) | %--RRRRRR--rrrrrr | |
| MPGHRB | $25F80066 | MAP (Rotation Parameter B Plane G,H) | %--RRRRRR--rrrrrr | |
| MPIJRB | $25F80068 | MAP (Rotation Parameter B Plane I,J) | %--RRRRRR--rrrrrr | |
| MPKLRB | $25F8006A | MAP (Rotation Parameter B Plane K,L) | %--RRRRRR--rrrrrr | |
| MPMNRB | $25F8006C | MAP (Rotation Parameter B Plane M,N) | %--RRRRRR--rrrrrr | |
| MPOPRB | $25F8006E | MAP (Rotation Parameter B Plane O,P) | %--RRRRRR--rrrrrr | |
| SCXIN0 | $25F80070 | Screen Scroll Value (NBG0, Horizontal Integer Part) | %-----NNNNNNNNNNN | |
| SCXDN0 | $25F80072 | Screen Scroll Value (NBG0, Horizontal Fractional Part) | %NNNNNNNN-------- | |
| SCYIN0 | $25F80074 | Screen Scroll Value (NBG0, Vertical Integer Part) | %-----NNNNNNNNNNN | |
| SCYDN0 | $25F80076 | Screen Scroll Value (NBG0, Vertical Fractional Part) | %NNNNNNNN-------- | |
| ZMXIN0 | $25F80078 | Coordinate Increment (NBG0, Horizontal Integer Part) | %-------------NNN | |
| ZMXDN0 | $25F8007A | Coordinate Increment (NBG0, Horizontal Fractional Part) | %NNNNNNNN-------- | |
| ZMYIN0 | $25F8007C | Coordinate Increment (NBG0, Vertical Integer Part) | %-------------NNN | |
| ZMYDN0 | $25F8007E | Coordinate Increment (NBG0, Vertical Fractional Part) | %NNNNNNNN-------- | |
| SCXIN1 | $25F80080 | Screen Scroll Value (NBG1, Horizontal Integer Part) | %-----NNNNNNNNNNN | |
| SCXDN1 | $25F80082 | Screen Scroll Value (NBG1, Horizontal Fractional Part) | %NNNNNNNN-------- | |
| SCYIN1 | $25F80084 | Screen Scroll Value (NBG1, Vertical Integer Part) | %-----NNNNNNNNNNN | |
| SCYDN1 | $25F80086 | Screen Scroll Value (NBG1, Vertical Fractional Part) | %NNNNNNNN-------- | |
| ZMXIN1 | $25F80088 | Coordinate Increment (NBG1, Horizontal Integer Part) | %-------------NNN | |
| ZMXDN1 | $25F8008A | Coordinate Increment (NBG1, Horizontal Fractional Part) | %NNNNNNNN-------- | |
| ZMYIN1 | $25F8008C | Coordinate Increment (NBG1, Vertical Integer Part) | %-------------NNN | |
| ZMYDN1 | $25F8008E | Coordinate Increment (NBG1, Vertical Fractional Part) | %NNNNNNNN-------- | |
| SCXN2 | $25F80090 | Screen Scroll Value (NBG2, Horizontal) | %-----NNNNNNNNNNN | |
| SCYN2 | $25F80092 | Screen Scroll Value (NBG2, Vertical | %-----NNNNNNNNNNN | |
| SCXN3 | $25F80094 | Screen Scroll Value (NBG3, Horizontal) | %-----NNNNNNNNNNN | |
| SCYN3 | $25F80096 | Screen Scroll Value (NBG3, Vertical | %-----NNNNNNNNNNN | |
| ZNCTL | $25F80098 | reduction enable register | %------NN------nn | |
| SCRCTL | $25F8009A | Line and Vertical Cell Scroll Control (NBG0,NBG1) | %--NNNNNN--nnnnnn | |
| VCSTAU | $25F8009C | Vertical Cell Scroll Table Address (NBG0,NBG1) | %-------------VVV | |
| VCSTAL | $25F8009E | Vertical Cell Scroll Table Address (NBG0,NBG1) | %VVVVVVVVVVVVVVV- | |
| LSTA0U | $25F800A0 | Line Scroll Table Address (NBG0) | %-------------NNN | |
| LSTA0L | $25F800A2 | Line Scroll Table Address (NBG0) | %NNNNNNNNNNNNNNN- | |
| LSTA1U | $25F800A4 | Line Scroll Table Address (NBG1) | %-------------NNN | |
| LSTA1L | $25F800A6 | Line Scroll Table Address (NBG1) | %NNNNNNNNNNNNNNN- | |
| LCTAU | $25F800A8 | Line Color Screen Table Address | %-------------VVV | |
| LCTAL | $25F800AA | Line Color Screen Table Address | %VVVVVVVVVVVVVVV- | |
| BKTAU | $25F800AC | Back Screen Table Address | ^B------------bbb | |
| BKTAL | $25F800AE | Back Screen Table Address | %BBBBBBBBBBBBBBBB | |
| RPMD | $25F800B0 | Rotation Parameter Mode | %--------------RR | |
| RPRCTL | $25F800B2 | Rotation Parameter Read Control | %-----RRR-----rrr | |
| KTCTL | $25F800B4 | Coefficient Table Control | %---RRRRR---rrrrr | |
| KTAOF | $25F800B6 | Coefficient Table Address Offset (Rotation Parameter A,B) | %-----RRR-----rrr | |
| OVPNRA | $25F800B8 | Screen Over Pattern Name (Rotation Parameter A) | %RRRRRRRRRRRRRRRR | |
| OVPNRB | $25F800BA | Screen Over Pattern Name (Rotation Parameter B) | %RRRRRRRRRRRRRRRR | |
| RPTAU | $25F800BC | Rotation Parameter Table Address (Rotation Parameter A,B) | %-------------RRR | |
| RPTAL | $25F800BE | Rotation Parameter Table Address (Rotation Parameter A,B) | %RRRRRRRRRRRRRRR- | |
| WPSX0 | $25F800C0 | Windows Position (W0, Horizontal Start Point) | %------WWWWWWWWWW | |
| WPSY0 | $25F800C2 | Windows Position (W0, Vertical Start Point) | %-------WWWWWWWWW | |
| WPEX0 | $25F800C4 | Windows Position (W0, Horizontal End Point) | %------WWWWWWWWWW | |
| WPEY0 | $25F800C6 | Windows Position (W0, Vertical End Point) | %-------WWWWWWWWW | |
| WPSX1 | $25F800C8 | Windows Position (W1, Horizontal Start Point) | %------WWWWWWWWWW | |
| WPSY1 | $25F800CA | Windows Position (W1, Vertical Start Point) | %-------WWWWWWWWW | |
| WPEX1 | $25F800CC | Windows Position (W1, Horizontal End Point) | %------WWWWWWWWWW | |
| WPEY1 | $25F800CE | Windows Position (W1, Vertical End Point) | %-------WWWWWWWWW | |
| WCTLA | $25F800D0 | Window Control (NBG0, NBG1) | %N-nnnnnnN-nnnnnn | |
| WCTLB | $25F800D2 | Window Control (NBG2, NBG3) | %N-nnnnnnN-nnnnnn | |
| WCTLC | $25F800D4 | Window Control (RGB0, Sprite) | %S-ssssssR-rrrrrr | |
| WCTLD | $25F800D6 | Window Control (Parameter Window, Color Calc. Window) | %C-ccccccR---rrrr | |
| LWTA0U | $25F800D8 | Line Window Table Address (W0) | %W------------www | |
| LWTA0L | $25F800DA | Line Window Table Address (W0) | %WWWWWWWWWWWWWWW- | |
| LWTA1U | $25F800DC | Line Window Table Address (W1) | %W------------www | |
| LWTA1L | $25F800DE | Line Window Table Address (W0) | %WWWWWWWWWWWWWWW- | |
| SPCTL | $25F800E0 | Sprite Control | %--ss-SSS--ssssss | |
| SDCTL | $25F800E2 | Shadow Control | %-------T--BRNNNN | |
| CRAOFA | $25F800E4 | Color Ram Address offset (NBG0-NBG3) | %-nnn-NNN-nnn-NNN | |
| CRAOFB | $25F800E6 | Color Ram Address offset (RBG0, Sprite) | %---------SSS-RRR | |
| LNCLEN | $25F800E8 | Line Color Screen Enable | %----------SRNNNN | |
| SFPRMD | $25F800EA | Special Priority Mode | %------RRNNNNNNNN | |
| CCCTL | $25F800EC | Color Calculation Control | %BBBB-ECC-SLRNNNN | |
| SFCCMD | $25F800EE | Special Color Calculation Mode | %------RRNNNNNNNN | |
| PRISA | $25F800F0 | Priority Number (Sprite 0,1) | %-----sss-----SSS | |
| PRISB | $25F800F2 | Priority Number (Sprite 2,3) | %-----sss-----SSS | |
| PRISC | $25F800F4 | Priority Number (Sprite 4,5) | %-----sss-----SSS | |
| PRISD | $25F800F6 | Priority Number (Sprite 6,7) | %-----sss-----SSS | |
| PRINA | $25F800F8 | Priority Number (NBG0,NBG1) | %-----NNN-----nnn | |
| PRINB | $25F800FA | Priority Number (NBG2,NBG3) | %-----NNN-----nnn | |
| PRIR | $25F800FC | Priority Number (RBG0) | %-------------nnn | |
| $25F800FE | Reserved | |||
| CCRSA | $25F80100 | Color Calculation Ration (Sprite 0,1) | %---sssss---SSSSS | |
| CCRSB | $25F80102 | Color Calculation Ration (Sprite 2,3) | %---sssss---SSSSS | |
| CCRSC | $25F80104 | Color Calculation Ration (Sprite 4,5) | %---sssss---SSSSS | |
| CCRSD | $25F80106 | Color Calculation Ration (Sprite 6,7) | %---sssss---SSSSS | |
| CCRNA | $25F80108 | Color Calculation Ration (NBG0,NBG1) | %---NNNNN---nnnnn | |
| CCRNB | $25F8010A | Color Calculation Ration (NBG2,NBG3) | %---NNNNN---nnnnn | |
| CCRR | $25F8010C | Color Calculation Ration (TBG0) | %-----------RRRRR | |
| CCRLB | $25F8010E | Color Calculation Ration (Line Color Screen, Back Screen) | %---BBBBB---LLLLL | |
| CLOFEN | $25F80110 | Color Offset Enable | %---------SBRNNNN | |
| CLOFSL | $25F80112 | Color Offset Select | %---------SBRNNNN | |
| COAR | $25F80114 | Color Offset A (Red) | %-------CCCCCCCCC | |
| COAG | $25F80116 | Color Offset A (Green) | %-------CCCCCCCCC | |
| COAB | $25F80118 | Color Offset A (Blue) | %-------CCCCCCCCC | |
| COBR | $25F8011A | Color Offset B (Red) | %-------CCCCCCCCC | |
| COBG | $25F8011C | Color Offset B (Green) | %-------CCCCCCCCC | |
| COBB | $25F8011E | Color Offset B (Blue) | %-------CCCCCCCCC |
SMPC System Manager & Peripheral control
See: ST-169-R1-072694 System Manager & Peripheral control PG 21+
| Name | Address | Purpose |
| IREG0 | $20100001 | Input Register |
| IREG1 | $20100003 | Input Register |
| IREG2 | $20100005 | Input Register |
| IREG3 | $20100007 | Input Register |
| IREG4 | $20100009 | Input Register |
| IREG5 | $2010000B | Input Register |
| IREG6 | $2010000D | Input Register |
| COMREG | $2010001F | Command Register |
| OREG0 | $20100021 | Output Register |
| OREG1 | $20100023 | Output Register |
| OREG2 | $20100025 | Output Register |
| OREG3 | $20100027 | Output Register |
| OREG4 | $20100029 | Output Register |
| OREG5 | $2010002B | Output Register |
| OREG6 | $2010002D | Output Register |
| OREG7 | $2010002F | Output Register |
| OREG8 | $20100031 | Output Register |
| OREG9 | $20100033 | Output Register |
| OREG10 | $20100035 | Output Register |
| OREG11 | $20100037 | Output Register |
| OREG12 | $20100039 | Output Register |
| OREG13 | $2010003B | Output Register |
| OREG14 | $2010003D | Output Register |
| OREG15 | $2010003F | Output Register |
| OREG16 | $20100041 | Output Register |
| OREG17 | $20100043 | Output Register |
| OREG18 | $20100045 | Output Register |
| OREG19 | $20100047 | Output Register |
| OREG20 | $20100049 | Output Register |
| OREG21 | $2010004B | Output Register |
| OREG22 | $2010004D | Output Register |
| OREG23 | $2010004F | Output Register |
| OREG24 | $20100051 | Output Register |
| OREG25 | $20100053 | Output Register |
| OREG26 | $20100055 | Output Register |
| OREG27 | $20100057 | Output Register |
| OREG28 | $20100059 | Output Register |
| OREG29 | $2010005B | Output Register |
| OREG30 | $2010005D | Output Register |
| OREG31 | $2010005F | Output Register |
| SR | $20100061 | Status Register |
| SF | $20100063 | Status Flag |
| PDR1 | $20100075 | Port Dat register 1 |
| PDR2 | $20100077 | Port Dat register 2 |
| DDR1 | $20100079 | Data Direction Register 1 |
| DDR2 | $2010007B | Data Direction Register 2 |
| IOSEL | $2010007D | IO Select |
| EXLE | $2010007F | External Latch Enable |